Take away lessons

Transistor. The NMOS transistor comprises a source, a gate, and a drain. It has n-type silicon for the source and drain, separated by p-type silicon, above which the gate is positioned. A depletion layer is created at the n-type and p-type interface, blocking the current flow through the transistor. The depletion layer can temporarily be reversed through the induction of an inversion layer, created by applying voltage on the transistor’s gate.

Weak and strong inversion. In the sub-threshold regime, transistor current (Ids) is exponentially related to Vgs. As Vgs increases, Ids rises exponentially toward saturation. When a transistor is operated in the sub-threshold regime, electron transport is governed by diffusion. Therefore, electron transport in this regime follows the same time scales and dynamic as ions do.

Integrated circuit: An assembly of electronic components, integrated and interconnected onto a chip.

Very-large-scale integration: The process of creating an integrated circuit comprises numerous nano-scale transistors onto a chip. The design process of an integrated circuit is usually initiated with system specification within feasibility and functional analysis are performed. Following an initial analysis, system-level architecture is de- vised, where the main components of the circuit are characterized along with their interfaces, data exchange, and communication protocols. Once subsystems are described, logic and circuit design are initiated and followed by simulation and verification. In the physical design stage, fabrication design takes place - transistors are placed and routed, and timing analysis and layout optimization take place. Finally, the chip is fabricated, packaged, and embedded within a larger board which supplies it with the required peripheral circuits (e.g., voltage stabilization and signal preprocessing).

Silicon neuron: An electrical design which follows the electrophysiological behavior of biological neurons.

The pulse current-source synapse: An electrical micro-power circuit offering magnitude control over spike-induced current.

The reset and discharge synapse: A pulse current-source synapse with an added temporal control over the spike-induced current.

The charge and discharge synapse: A reset and discharge synapse with an added capacity for signal integration of incoming spikes.

The log-domain integrator synapse: A charge and discharge synapse in which signal integration is held linearly.

The axon-hillock neuron: A primary spike generation circuit which offers firing rate tuning.

Voltage-amplifier LIF neuron: The axon-hillock neuron with an added capacity for spike’s form modulation. The voltage amplifier LIF neuron adds two voltage inverters to the axon-hillock circuit. The first inverter activates INA through Mna and the second activates the Ik currents. Together they simulate the behavior of a biological neuron, providing control of the waveform of the generated spike.